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| author | Philip Reames <preames@rivosinc.com> | 2023-08-16 07:44:39 -0700 |
|---|---|---|
| committer | Philip Reames <listmail@philipreames.com> | 2023-08-16 07:50:59 -0700 |
| commit | 3c2a66973e19c92659f1e52b28b824c57a6322c8 (patch) | |
| tree | c7f2cf2ceca7dc04e981445cf82f544e143e5cc9 /lldb/test/API/functionalities/interactive_scripted_process/TestInteractiveScriptedProcess.py | |
| parent | bd1ddc5850b16d01b37dc01e7e781dc4042f9dc2 (diff) | |
[RISCVInsertVSETVLI] Generalize scalar extract (vmv.x.s, and vmx.f.s) hamdling
vmv.x.s and vmv.f.s are unconditional. They read the low element of a vector
register (not vector group), and function even when VL=0 or VSTART>0. As such,
they are don't care with respect to both VL and LMUL.
We'd previously had handling in the forward pass only via the NoRegister
mechanusm. (The only instructions with SEW but without VL are these extracts.)
This patch moves that handling into getDemanded so that the backwards pass
benefits as well.
Differential Revision: https://reviews.llvm.org/D157991
Diffstat (limited to 'lldb/test/API/functionalities/interactive_scripted_process/TestInteractiveScriptedProcess.py')
0 files changed, 0 insertions, 0 deletions