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authorCraig Topper <craig.topper@sifive.com>2023-05-08 13:02:18 -0700
committerCraig Topper <craig.topper@sifive.com>2023-05-08 13:02:19 -0700
commit6b429a9cf93342a280d67f63104285888c9884d1 (patch)
tree9df8f0e0c7429917cdc69c7f531c962bd827314a /lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.h
parent14971ae255a4ab5f7d569247f55083923bfa5f2b (diff)
[RISCV] Improve RV64 codegen for i32 ISD::SADDO when RHS is constant.
This uses the same sequence we get from LegalizeDAG for i32 on RV32, but modified to use W instructions. When the RHS is constant one of the setccs simplifies to a constant and the xor will either be an xori with 1 or get removed. When the RHS is not a constant it was not an obvious improvement and it was a regression when used with a branch. So I've restricted to the constant case. Reviewed By: reames Differential Revision: https://reviews.llvm.org/D150135
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.h')
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