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| author | Chenbing Zheng <Chenbing.Zheng@streamcomputing.com> | 2022-07-21 10:12:29 +0800 |
|---|---|---|
| committer | Chenbing Zheng <Chenbing.Zheng@streamcomputing.com> | 2022-07-21 10:12:29 +0800 |
| commit | 8c124c908857f7018ed032011046a2a38faf2307 (patch) | |
| tree | a8982e32e19001a4bf113e800cbddd9ab4f7fa48 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.cpp | |
| parent | 8075f680c8fbff9d56055520ded00579b3c45ddc (diff) | |
[InstCombine] (ShiftValC >> Y) >s -1/<s 0 --> Y != 0/==0
We can do folds (ShiftValC >> Y) >s -1 --> Y != 0 and
(ShiftValC >> Y) <s 0 --> Y == 0, with ShiftValC < 0.
Alive2: https://alive2.llvm.org/ce/z/-PRHfD
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D129726
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptedProcessPythonInterface.cpp')
0 files changed, 0 insertions, 0 deletions