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| author | Victor Campos <victor.campos@arm.com> | 2021-03-19 11:19:32 +0000 |
|---|---|---|
| committer | Victor Campos <victor.campos@arm.com> | 2021-03-23 11:49:06 +0000 |
| commit | f22b4c7122bc86c640f75fd8b2b165d124204105 (patch) | |
| tree | e5320ea2d8638da2a2402b9b152fc0b99911eac0 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | faf5f1cbbac020c7a6c6de188ae96a4dc15b5cdd (diff) | |
[ARM] Handle debug instrs in ARM Low Overhead Loop pass
In function ConvertVPTBlocks(), it is assumed that every instruction
within a vector-predicated block is predicated. This is false for debug
instructions, used by LLVM.
Because of this, an assertion failure is reached when an input contains
debug instructions inside VPT blocks. In non-assert builds, an out of
bounds memory access took place.
The present patch properly covers the case of debug instructions.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D99075
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions