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| author | Jason Eckhardt <jeckhardt@nvidia.com> | 2024-06-25 16:42:29 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-25 16:42:29 -0500 |
| commit | edf5782f1780f480c3ae3fc0a44bf5432f9aa48b (patch) | |
| tree | f4405fa4b538bab1c8d01b828dbcf7cb44197f66 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 7e59b20034aa77d69e5218ff44e3cba8a500f76a (diff) | |
[TableGen] Check for duplicate register tuple definitions. (#95725)
Currently TableGen does not directly detect duplicate synthesized
registers as can happen in this example:
def GPR128 : RegisterTuples<[sub0, sub1, sub2, sub3],
[(decimate (shl GPR32, 0), 1),
(decimate (shl GPR32, 1), 1),
(decimate (shl GPR32, 2), 1),
(decimate (shl GPR32, 3), 1)]>;
def GPR128_Aligned : RegisterTuples<[sub0, sub1, sub2, sub3],
[(decimate (shl GPR32, 0), 4),
(decimate (shl GPR32, 1), 4),
(decimate (shl GPR32, 2), 4),
(decimate (shl GPR32, 3), 4)]>;
TableGen does fail, but with an unrelated and difficult to understand
error that happens downstream of tuple expansion:
"error: No SubRegIndex for R0_R1_R2_R3 in R0_R1_R2_R3".
This patch detects the problem directly during expansion and emits an
error pointing the user to the actual issue:
"error: Register tuple redefines register 'R0_R1_R2_R3'".
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions
