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authorArd Biesheuvel <ardb@google.com>2021-10-27 16:27:00 -0700
committerNick Desaulniers <ndesaulniers@google.com>2021-10-27 16:42:11 -0700
commitd7e089f2d6a5cd5f283a90ab29241d20d4fc3ed1 (patch)
treea56983c115e8ea72b4de6112dc7cf34f3a06a440 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
parent33427fdb7b52b79ce5e25b7e14e0f1a44d876bd2 (diff)
[ARM] Use hardware TLS register in Thumb2 mode when -mtp=cp15 is passed
In ARM mode, passing -mtp=cp15 forces the use of an inline MRC system register read to move the thread pointer value into a register. Currently, in Thumb2 mode, -mtp=cp15 is ignored, and a call to the __aeabi_read_tp helper is emitted instead. This is inconsistent, and breaks the Linux/ARM build for Thumb2 targets, as the Linux kernel does not provide an implementation of __aeabi_read_tp,. Reviewed By: nickdesaulniers, peter.smith Differential Revision: https://reviews.llvm.org/D112600
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
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