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| author | Craig Topper <craig.topper@sifive.com> | 2022-01-09 17:28:04 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-01-09 17:48:05 -0800 |
| commit | a500f7f48fdb64def09cb3b7487759b0972f2347 (patch) | |
| tree | 438e4b28ba1df5863dff424d184eb8ec9c0dc105 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 22430ede7e497d67c87fe900cc685690c5c3ec0c (diff) | |
[SelectionDAG] Add FP_TO_UINT_SAT/FP_TO_SINT_SAT to computeKnownBits/computeNumSignBits.
These nodes should saturate to their saturating VT. We can use this
information to know the bits past the VT are all zeros or all sign bits.
I think we might only have test coverage for the unsigned case. I'll
verify and add tests.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D116870
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions