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| author | Mingming Liu <mingmingl@google.com> | 2023-04-23 12:23:33 -0700 |
|---|---|---|
| committer | Mingming Liu <mingmingl@google.com> | 2023-04-26 09:18:41 -0700 |
| commit | 9879e5865a8c5429ceaa180f433f1e3140d105ed (patch) | |
| tree | e81848b80855c8267a8d736becbbf7efedf2f43c /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 22516593ae741a35aaa8afd14c33e03fc7586612 (diff) | |
[InlineAsm][AArch64]Add backend support for flag output parameters
- The set of flag is from https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Flag-Output-Operands
Before:
- ARM64 GCC supports flag output constraints, while Clang doesn't parse condition code, as shown in https://gcc.godbolt.org/z/7jzMEK796
- LLVM ISel won't lower them either (as shown in https://gcc.godbolt.org/z/Pv4PPf56c)
After:
- Given flag output constraints in LLVM IR, condition code is parsed and flag output is lowered to 'cset'.
- Clang parse is not added in this patch.
Differential Revision: https://reviews.llvm.org/D149032
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions