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authorCraig Topper <craig.topper@sifive.com>2024-07-29 09:09:00 -0700
committerGitHub <noreply@github.com>2024-07-29 09:09:00 -0700
commit922558f47446fc732aa474f7bffc3190b4ffab43 (patch)
treeabefc5faf20779620ff5a8748458d150dc1fa71f /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
parent7647f88234cadf0aed019abb1fc723c6708b871c (diff)
[RISCV] Remove registers from ins of Priv instructions. (#100857)
The rd and rs1 encoding are already forced to 0s. We don't need registers too.
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