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authorPhilip Reames <preames@rivosinc.com>2024-07-24 10:02:21 -0700
committerPhilip Reames <listmail@philipreames.com>2024-07-24 10:09:54 -0700
commit8fd9624cf729dd722a170a9dfd8f725966515231 (patch)
tree73b38c6a37a72090ced5a405b226b3998bedf9d6 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
parentcdc193459d90fad83d2eafaccfe03368a9a8a160 (diff)
[RISCV][CostModel] Test default lowering strategy for vector LD/ST
Remove two options from the test command line: * -riscv-v-vector-bits-min=128 -- This has no effect as v implied zvl128b, which provides the same minimum. * -riscv-v-fixed-length-vector-lmul-max=1 -- This one forced the backend to split as if LMUL>m1 were illegal. This diverges significantly from default behavior (where all LMUL are legal). Note that we do still have splitting test coverage after this change. Look at e.g. 32 x i64.
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