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| author | mgudim <mgudim@gmail.com> | 2023-09-19 10:39:43 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-09-19 10:39:43 -0400 |
| commit | 8f8f4493d5fc6a025fff678f030da73dcfd8baa7 (patch) | |
| tree | 7d81ac11c3566d457651bc16075a1efe56f9c6ff /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | e25cd088a642d270c688611b85e22bc83f32f48e (diff) | |
[RISCV] Recognize veyron-v1 processor in clang driver. (#66703)
Subsequent PRs will add the scheduling model and support for macro
fusions.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
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