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authorJay Foad <jay.foad@amd.com>2023-10-26 15:39:10 +0100
committerGitHub <noreply@github.com>2023-10-26 15:39:10 +0100
commit7caff73e38038a98b837566eaf0e2e50754e2443 (patch)
treef247c6a0f1e63b6b4581ad493a0bc85e8a2bc6b6 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
parent4afe550ba677ca8998f548a80c832ee0f940cca6 (diff)
[AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (#70332)
This helped to catch a codegen failure caused by #69703. MachineVerifier did not complain about this malformed COPY either before regalloc: %9:vreg_64 = COPY %17:vgpr_32 Or after regalloc: renamable $vgpr0_vgpr1 = COPY renamable $vgpr2, implicit $exec But we can at least catch the problem when copyPhysReg tries to expand it into 32-bit register moves and fails to find suitable source registers: $vgpr0 = V_MOV_B32_e32 $noreg, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2 $vgpr1 = V_MOV_B32_e32 $noreg, implicit $exec, implicit $vgpr2, implicit $exec
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
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