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authorDavid Green <david.green@arm.com>2024-09-24 08:10:50 +0100
committerGitHub <noreply@github.com>2024-09-24 08:10:50 +0100
commit78ff736db2313642c3d8dd74beee3bc0b21c5c2a (patch)
treeadfb6af76b54cf30f6fddd72ccbd6d41daeea40b /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
parentf6a8eb98b13ee50c67ecf4804461a23fba7398aa (diff)
[ARM] Fix VMOVRRD combine with non-canonical inserts. (#109639)
In some situations, in the test case here with the multiple calls being late legalized, we can see inserts of the form: ``` b = insert a, x, 0 c = insert b, y, 1 d = insert c, z, 0 bc = bitcast d e = extract bc, 0 r = vmovrrd e ``` The redundant insert will usually be removed, but in some cases are not prior to PerformVMOVRRDCombine. The code was finding the first insert from each lane (x and y), as opposed to the last (z and y).
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
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