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| author | Chen Zheng <czhengsz@cn.ibm.com> | 2020-11-05 09:32:25 -0500 |
|---|---|---|
| committer | Chen Zheng <czhengsz@cn.ibm.com> | 2020-12-20 19:48:26 -0500 |
| commit | 564066524ad0872eb8b7cadfaf7c94274f3d5951 (patch) | |
| tree | 5f37309974f0536173d855c61c429e6cb80dfd24 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 4dce7c2e2092953f2cea1a2c1ffd4a53ec2531ac (diff) | |
[PowerPC] add has side effect for SAT bit clobber intrinsics/instructions
This patch does two things:
1: fix the typo that intrinsic mfvscr should be with no readmem property
2: since VSCR is not modeled yet, add has side effect for SAT bit clobber
intrinsics/instructions.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D90807
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions