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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-06-11 21:40:21 -0400 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-06-14 13:12:01 -0400 |
| commit | 46579471fd2b9c00ba982325f53f30192cc5797f (patch) | |
| tree | 2ad7e0e3b091aa5ca97647553ac31b5ed47c6a64 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 1c3d7709dec22c61d9c3105e4838edce8e6ac014 (diff) | |
AMDGPU: Fix spill/restore of 192-bit registers
I tried to use an IR inline asm test, but that doesn't work since the
inline asm handling asserts without an MVT to use.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions