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| author | Diana Picus <diana.picus@linaro.org> | 2019-03-25 08:54:29 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2019-03-25 08:54:29 +0000 |
| commit | 254b11a0fd864ab42eef2d6cf781330959c58567 (patch) | |
| tree | 103034fadbed594c5b778b6828e01c4ab2058ad0 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | d8e78022c63b9fc9af6260eef667231c929e9cee (diff) | |
[ARM GlobalISel] 64-bit memops should be aligned
We currently use only VLDR/VSTR for all 64-bit loads/stores, so the
memory operands must be word-aligned. Mark aligned operations as legal
and narrow non-aligned ones to 32 bits.
While we're here, also mark non-power-of-2 loads/stores as unsupported.
llvm-svn: 356872
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions