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| author | Janek van Oirschot <janek.vanoirschot@amd.com> | 2023-04-26 14:05:06 +0100 |
|---|---|---|
| committer | Janek van Oirschot <janek.vanoirschot@amd.com> | 2023-04-26 14:10:25 +0100 |
| commit | 124acb7ca31aa358cc5f7b4a5d09edbd1c0cac84 (patch) | |
| tree | c76eb201226b78ee469a1ef08499701a8a495bd0 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | de2547329b41ad6ea4ea876d12731bde5a6b64c5 (diff) | |
[AMDGPU] Fix negative offset values interpretation in getMemOperandsWithOffset for DS
The offset values may result in an erroneous scheduling of a load before write for a memory location if the offset values are represented as negative values in MIR, despite actually being unsigned values. This representation in MIR happens as SelectionDAG::getConstant could go through APInt to represent the encoding which assumes the MSB of the encoding as a sign-bit, regardless of whether it is supposed to be a signed value. The 8-bit negative (interpreted) value gets cast to an unsigned 32 bit value in getMemOperandsWithOffset used for comparisons in areMemAccessesTriviallyDisjoint eventually leading to an erroneous schedule in the machine scheduler.
Reviewed By: arsenm, foad
Differential Revision: https://reviews.llvm.org/D149080
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions