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| author | Sander de Smalen <sander.desmalen@arm.com> | 2018-06-18 13:39:29 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2018-06-18 13:39:29 +0000 |
| commit | 118099a62cec763e912cbfbe61d52687364fd0b8 (patch) | |
| tree | 9d9ed36b455c3109f43762859e46dd334361d8a3 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 67dc08bd4c58c7571cf2c10d50ade0f2a3e0f5da (diff) | |
[TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases.
Allow a tied operand of a different operand class in InstAliases,
so that the operand can be printed (and added to the MC instruction)
as the appropriate register. For example, 'GPR64as32', which would
be printed/parsed as a 32bit register and should match a tied 64bit
register operand, where the former is a sub-register of the latter.
This patch also generalizes the constraint checking to an overrideable
method in MCTargetAsmParser, so that target asmparsers can specify
whether a given operand satisfies the tied register constraint.
Reviewers: olista01, rengolin, fhahn, SjoerdMeijer, samparker, dsanders, craig.topper
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D47714
llvm-svn: 334942
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions