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| author | Sanjay Patel <spatel@rotateright.com> | 2021-11-11 10:24:24 -0500 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2021-11-11 10:27:37 -0500 |
| commit | 11522cfcad6ba38b0b61a727a711adeef98571c9 (patch) | |
| tree | 4fcc46653c590db39cc9ccc1e7a11fe17ae7e7b0 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 8313b47a580771635368a40f310988e4e2f534c5 (diff) | |
[DAGCombiner] add fold for vselect based on mask of signbit, part 3
(Cond0 s> -1) ? N1 : 0 --> ~(Cond0 s>> BW-1) & N1
https://alive2.llvm.org/ce/z/mGCBrd
This was suggested as a potential enhancement in D113212 (also 7e30404c3b6c ).
There's an improvement for AArch that could be generalized ( X > -1 --> X >= 0 ).
For x86, we have a counter-acting fold for most cases that turns the shift+not
back into a setcc, so that needs a work-around to get more cases to use "pandn":
D113603
Note that this pattern (and a previous one) are not currently canonical forms
in IR:
https://alive2.llvm.org/ce/z/e4o96b
Adding swapped variants is left as a TODO item here, but is planned as
a near-term follow-up patch.
Differential Revision: https://reviews.llvm.org/D113426
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions