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authorTim Renouf <tpr.llvm@botech.co.uk>2019-03-22 10:11:21 +0000
committerTim Renouf <tpr.llvm@botech.co.uk>2019-03-22 10:11:21 +0000
commit033f99a2e567f0eebec6faa961025318f1e724f5 (patch)
tree5619a489ebfc96ad8d476553cd1ffc8425a9cb12 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
parentf8c785bf12136fb6590a144ff1edd3bc9be61ccf (diff)
[AMDGPU] Added v5i32 and v5f32 register classes
They are not used by anything yet, but a subsequent commit will start using them for image ops that return 5 dwords. Differential Revision: https://reviews.llvm.org/D58903 Change-Id: I63e1904081e39a6d66e4eb96d51df25ad399d271 llvm-svn: 356735
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
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