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| author | Philip Reames <preames@rivosinc.com> | 2024-08-22 07:30:39 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-22 07:30:39 -0700 |
| commit | 00baa1af0f73f0e4c12edc12f57e62021ada7ccd (patch) | |
| tree | 8656ead402939523850af2f5df1203350b772724 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp | |
| parent | 41dcdfbff12a9bc06af25457d603b6ec26b6b45f (diff) | |
[DAG][RISCV] Use vp_reduce_* when widening illegal types for reductions (#105455)
This allows the use a single wider operation with a restricted EVL
instead of padding the vector with the neutral element.
For RISCV specifically, it's worth noting that an alternate padded
lowering is available when VL is one less than a power of two, and LMUL
<= m1. We could slide the vector operand up by one, and insert the
padding via a vslide1up. We don't currently pattern match this, but we
could. This form would arguably be better iff the surrounding code
wanted VL=4. This patch will force a VL toggle in that case instead.
Basically, it comes down to a question of whether we think odd sized
vectors are going to appear clustered with odd size vector operations,
or mixed in with larger power of two operations.
Note there is a potential downside of using vp nodes; we loose any
generic DAG combines which might have applied to the widened form.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp')
0 files changed, 0 insertions, 0 deletions
