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authorCraig Topper <craig.topper@sifive.com>2024-09-18 09:43:48 -0700
committerGitHub <noreply@github.com>2024-09-18 09:43:48 -0700
commit8e4909aa198d8beaf32ee0abc59a06e2e54dc3bd (patch)
treea525f07efbfadb0595b55ee7a1e5e45e910f9d21 /lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
parent292ee93a87018bfef519ceff7de676e4792aa8d9 (diff)
[RISCV] Remove unnecessary vand.vi from vXi1 and nvXvi1 VECTOR_REVERSE codegen. (#109071)
Use a setne with 0 instead of a trunc. We know we zero extended the node so we can get by with a non-zero check only. The truncate lowering doesn't know that we zero extended so has to mask the lsb. I don't think DAG combine sees the trunc before we lower it to RISCVISD nodes so we don't get a chance to use computeKnownBits to remove the AND.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp')
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