diff options
| author | Kerry McLaughlin <kerry.mclaughlin@arm.com> | 2020-04-21 11:47:24 +0100 |
|---|---|---|
| committer | Kerry McLaughlin <kerry.mclaughlin@arm.com> | 2020-04-21 12:04:43 +0100 |
| commit | 0df40d6ef8b868e0349223a7f2f9f554389cf3f0 (patch) | |
| tree | 214c79bcc40a5819c2e638efa348d43401f9cb14 /lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp | |
| parent | 1811061c387baeff59446a090890368da3d86d42 (diff) | |
[AArch64][SVE] Add addressing mode for contiguous loads & stores
Summary:
This patch adds the register + register addressing mode for
SVE contiguous load and store intrinsics (LD1 & ST1)
Reviewers: sdesmalen, fpetrogalli, efriedma, rengolin
Reviewed By: fpetrogalli
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D78509
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp')
0 files changed, 0 insertions, 0 deletions