summaryrefslogtreecommitdiff
path: root/lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
diff options
context:
space:
mode:
authorSaleem Abdulrasool <compnerd@compnerd.org>2025-11-11 13:37:21 -0800
committerGitHub <noreply@github.com>2025-11-11 13:37:21 -0800
commit2d8563f4b880184c001da00decd92f2b0d6befe6 (patch)
tree77badcc971199a66293f9e684dfbe186ed4e1149 /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
parent2f7a5f7ffdff0660d465bf6024177529bc857de7 (diff)
AArch64: align pair-wise spills on WoS to 16-byte (#166902)
Adjust the frame setup code for Windows ARM64 to attempt to align pair-wise spills to 16-byte boundaries. This enables us to properly emit the spills for custom clang calling convensions such as preserve most which spills r9-r15 which are normally nonvolatile registers. Even when using the ARM64EC opcodes for the unwinding, we cannot represent the spill if it is unaligned.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h')
0 files changed, 0 insertions, 0 deletions