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| author | Shengchen Kan <shengchen.kan@intel.com> | 2024-06-27 17:01:55 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-27 17:01:55 +0800 |
| commit | 15fc801cf0ca7a4d09fe52546394efa51414047a (patch) | |
| tree | 3a386fb2ac016452ead27e5469d6c5d36499dddc /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h | |
| parent | 8a43dc3efdd9bfba0bea32061ef2f3397a968eb9 (diff) | |
[X86][CodeGen] Support hoisting load/store with conditional faulting (#96720)
1. Add TTI interface for conditional load/store.
2. Mark 1 x i16/i32/i64 masked load/store legal so that it's not
legalized in pass scalarize-masked-mem-intrin.
3. Visit 1 x i16/i32/i64 masked load/store to build a target-specific
CLOAD/CSTORE node to avoid error in
`DAGTypeLegalizer::ScalarizeVectorResult`.
4. Combine DAG to simplify the nodes for CLOAD/CSTORE.
5. Lower CLOAD/CSTORE to CFCMOV by pattern match.
This is CodeGen part of #95515
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h')
0 files changed, 0 insertions, 0 deletions