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| author | Craig Topper <craig.topper@sifive.com> | 2025-11-20 15:00:35 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-11-20 15:00:35 -0800 |
| commit | fbc093588f654ba771dfc055687676edf4d76884 (patch) | |
| tree | 1c2f1329b931d9a702ef9e8eddb11b5473a5f118 /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h | |
| parent | 0f12abe47c15c28949f9b609f2c90333176f17d1 (diff) | |
[RISCV] Only add v2i32 to GPR regclass in the RV64 hardware mode. (#168930)
Removes about 200 bytes of unneeded patterns from RISCVGenDAGISel.inc
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h')
0 files changed, 0 insertions, 0 deletions