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| author | Brandon Wu <songwu0813@gmail.com> | 2025-11-21 13:04:05 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-11-21 05:04:05 +0000 |
| commit | 645e0dcbff33248bd2cdc4ac258420de9b5936b1 (patch) | |
| tree | 7a52bad1f92556121f2109cce707d0ab1478fd0c /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h | |
| parent | cf837e2ffe7b89a861f7145235190a1a000f3559 (diff) | |
[llvm][RISCV] Implement Zilsd load/store pair optimization (#158640)
This commit implements a complete load/store optimization pass for the
RISC-V Zilsd extension, which combines pairs of 32-bit load/store
instructions into single 64-bit LD/SD instructions when possible.
Default alignment is 8, it also provide zilsd-4byte-align feature for
looser condition.
Related work: https://reviews.llvm.org/D144002
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Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface/ScriptedProcessPythonInterface.h')
0 files changed, 0 insertions, 0 deletions