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authorNathan Gauër <brioche@google.com>2024-09-04 11:27:03 +0200
committerGitHub <noreply@github.com>2024-09-04 11:27:03 +0200
commitafb6dafc6b680fb204d40c7fee4b339aa8471010 (patch)
treebb7d9956f197d1b146ab7c7979c528fb275f533c /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
parent5914566474de29309b0b4815ecd406805793de1f (diff)
[clang][HLSL] Add WaveIsFirstLane() intrinsic (#103299)
This commits add the WaveIsFirstLane() hlsl intrinsinc. This intrinsic uses the convergence intrinsincs for the SPIR-V backend. On the DXIL side, I'm not sure what the strategy is for convergence, so I implemented that like in DXC: a normal builtin function. Signed-off-by: Nathan Gauër <brioche@google.com>
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp')
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