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| author | Craig Topper <craig.topper@sifive.com> | 2024-09-03 20:13:40 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-09-03 20:18:01 -0700 |
| commit | a5ce66423bfff6f2185e5fe48bc6ffc0ade7df4d (patch) | |
| tree | d85f858626d46430f6f6e66c32f2210aee5028d8 /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp | |
| parent | 86627149f6fd5148311b7b0aa1c7195a05a5d6a8 (diff) | |
[RISCV] Remove RISCVISD::FP_ROUND_BF16.
Use isel patterns on regular FP_ROUND. For double->bf16 we need
to emit two instructions. Note the double->bf16 conversion does
double rounding, but I don't know a good way to fix that.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp')
0 files changed, 0 insertions, 0 deletions