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| author | Piyou Chen <piyou.chen@sifive.com> | 2024-08-14 18:11:54 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-14 18:11:54 +0800 |
| commit | 8bf298fa95bb23081e9e2507bfb31b017c01be15 (patch) | |
| tree | 6e1421f89664fffca2620fca1eff0d7f1b08e195 /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.h | |
| parent | 2fc7a72733762d685a07f846b44dc17a0585098e (diff) | |
[RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … (#101449)
…ImplID
This patch
1. remove the vendorId from `__riscv_vendor_feature_bits`
2. Define a new structure for vendorID, ArchID and ImplID
3. Update the relate init code
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface/ScriptedPlatformPythonInterface.h')
0 files changed, 0 insertions, 0 deletions