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authorMatt Arsenault <Matthew.Arsenault@amd.com>2025-09-04 09:13:36 +0900
committerGitHub <noreply@github.com>2025-09-04 09:13:36 +0900
commit1959e12e7dd84f388547c3f85af7b919f2253377 (patch)
treeb79411cddcd4d829bff1bff5c0897ebd7222e504 /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.cpp
parent27114e4f302cb8724eec758077a430dd7fb300ef (diff)
AMDGPU: Add agpr variants of multi-data DS instructions (#156420)
The instruction definitions for loads and stores do not accurately model the operand constraints of loads and stores with AGPRs. They use AV register classes, plus a hack a hack in getRegClass/getOpRegClass to avoid using AGPRs or AV classes with the multiple operand cases, but it did not consider the 3 operand case. Model this correctly by using separate all-VGPR and all-AGPR variants for the cases with multiple data operands. This does regress the assembler errors on gfx908 for the multi-operand cases. It now reports a generic operand invalid error for GPU instead of the specific message that agpr loads and stores aren't supported. In the future AMDGPURewriteAGPRCopyMFMA should be taught to replace the VGPR forms with the AGPR ones. Most of the diff is fighting the DS pseudo structure. The mnemonic was being used as the key to SIMCInstr, which is a collision in the AGPR case. We also need to go out of our way to make sure we are using the gfx9+ variants of the pseudos without the m0 use. The DS multiclasses could use a lot of cleanup. Fixes #155777
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