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authorLukacma <Marian.Lukac@arm.com>2024-08-15 13:52:35 +0100
committerGitHub <noreply@github.com>2024-08-15 13:52:35 +0100
commitd7aeea626dac64449fc67cf8ddf8f326a0157d91 (patch)
treeb48f608f309dbcf0aba249683688272ee4f4f8e6 /lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.h
parentbfce1aae76de05dd6ac9fbbd997295fe5aa280c0 (diff)
[AArch64] optimise SVE prefetch intrinsics with no active lanes (#103052)
This patch extends https://github.com/llvm/llvm-project/pull/73964 and optimises away SVE prefetch intrinsics when predicate is zero.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface/OperatingSystemPythonInterface.h')
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