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| author | Lei Liu <lei.liu2@windriver.com> | 2016-09-21 07:41:41 +0000 |
|---|---|---|
| committer | Lei Liu <lei.liu2@windriver.com> | 2016-09-21 07:41:41 +0000 |
| commit | 6c87f2352626d999530fde97a4ad226311bf3839 (patch) | |
| tree | 942ae3388bd0ac76603a7cb6d7a43a5bea398128 /lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptRuntime.cpp | |
| parent | 6f99d2433b0a2a0af6b54dddbb3b752d9d4c8a18 (diff) | |
AArch64: Set shift bit of TLSLE HI12 add instruction
Summary: AArch64 LLVM assembler emits add instruction without shift bit to calculate the higher 12-bit address of TLS variables in local exec model. This generates wrong code sequence to access TLS variables with thread offset larger than 0x1000.
Reviewers: t.p.northover, peter.smith, rovka
Subscribers: salim.nasser, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D24702
llvm-svn: 282057
Diffstat (limited to 'lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptRuntime.cpp')
0 files changed, 0 insertions, 0 deletions