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authorMark Danial <mark.danial@ibm.com>2022-12-30 09:50:46 +0200
committermadanial <madaniam11@gmail.com>2022-12-30 10:21:00 +0200
commit320fbff4d9e335dc8ee8d8e44389e598bcee25d6 (patch)
tree21fcfa2698af8a8f94be6627eb5ee2c643a6a133 /flang/lib/Optimizer/CodeGen/Target.cpp
parentfff0d1b836d1ce043deb401e09ecc1c84bdfe11a (diff)
[Flang] Add ppc64 support to Optimizer/CodeGen/Target.cpp for AIX 64 bit
Adding support for ppc64 (big endian) in order to support flang on 64 bit AIX Reviewed By: clementval, kiranchandramohan Differential Revision: https://reviews.llvm.org/D138390
Diffstat (limited to 'flang/lib/Optimizer/CodeGen/Target.cpp')
-rw-r--r--flang/lib/Optimizer/CodeGen/Target.cpp34
1 files changed, 34 insertions, 0 deletions
diff --git a/flang/lib/Optimizer/CodeGen/Target.cpp b/flang/lib/Optimizer/CodeGen/Target.cpp
index ef8e1d9f536a..28191a372b40 100644
--- a/flang/lib/Optimizer/CodeGen/Target.cpp
+++ b/flang/lib/Optimizer/CodeGen/Target.cpp
@@ -223,6 +223,37 @@ struct TargetAArch64 : public GenericTarget<TargetAArch64> {
} // namespace
//===----------------------------------------------------------------------===//
+// PPC64 (AIX 64 bit) target specifics.
+//===----------------------------------------------------------------------===//
+
+namespace {
+struct TargetPPC64 : public GenericTarget<TargetPPC64> {
+ using GenericTarget::GenericTarget;
+
+ static constexpr int defaultWidth = 64;
+
+ CodeGenSpecifics::Marshalling
+ complexArgumentType(mlir::Location, mlir::Type eleTy) const override {
+ CodeGenSpecifics::Marshalling marshal;
+ // two distinct element type arguments (re, im)
+ marshal.emplace_back(eleTy, AT{});
+ marshal.emplace_back(eleTy, AT{});
+ return marshal;
+ }
+
+ CodeGenSpecifics::Marshalling
+ complexReturnType(mlir::Location, mlir::Type eleTy) const override {
+ CodeGenSpecifics::Marshalling marshal;
+ // Use a type that will be translated into LLVM as:
+ // { t, t } struct of 2 element type
+ mlir::TypeRange range = {eleTy, eleTy};
+ marshal.emplace_back(mlir::TupleType::get(eleTy.getContext(), range), AT{});
+ return marshal;
+ }
+};
+} // namespace
+
+//===----------------------------------------------------------------------===//
// PPC64le linux target specifics.
//===----------------------------------------------------------------------===//
@@ -395,6 +426,9 @@ fir::CodeGenSpecifics::get(mlir::MLIRContext *ctx, llvm::Triple &&trp,
case llvm::Triple::ArchType::aarch64:
return std::make_unique<TargetAArch64>(ctx, std::move(trp),
std::move(kindMap));
+ case llvm::Triple::ArchType::ppc64:
+ return std::make_unique<TargetPPC64>(ctx, std::move(trp),
+ std::move(kindMap));
case llvm::Triple::ArchType::ppc64le:
return std::make_unique<TargetPPC64le>(ctx, std::move(trp),
std::move(kindMap));