[CFE][Codegen] Update auto-generated check lines for few GPU lit tests

which is essentially required as a pre-commit for https://reviews.llvm.org/D110257.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D110676

1 files changed, 74 insertions, 44 deletions

diff --git a/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp b/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
index 7ecc19ccfa4b..16eb318cd4f6 100644
--- a/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
+++ b/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
@@ -1,53 +1,60 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - | FileCheck %s
 
-// CHECK-LABEL: define{{.*}} void @_Z5func1Pi(i32* %x)
+// CHECK-LABEL: @_Z5func1Pi(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i32*, align 8, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR_ASCAST:%.*]] = addrspacecast i32* addrspace(5)* [[X_ADDR]] to i32**
+// CHECK-NEXT:    store i32* [[X:%.*]], i32** [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    store i32 1, i32* [[TMP0]], align 4
+// CHECK-NEXT:    ret void
+//
 void func1(int *x) {
-  // CHECK: %[[x_addr:.*]] = alloca i32*{{.*}}addrspace(5)
-  // CHECK: %[[r0:.*]] = addrspacecast i32* addrspace(5)* %[[x_addr]] to i32**
-  // CHECK: store i32* %x, i32** %[[r0]]
-  // CHECK: %[[r1:.*]] = load i32*, i32** %[[r0]]
-  // CHECK: store i32 1, i32* %[[r1]]
   *x = 1;
 }
 
-// CHECK-LABEL: define{{.*}} void @_Z5func2v()
+// CHECK-LABEL: @_Z5func2v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[LV1:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[LV1_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[LV1]] to i32*
+// CHECK-NEXT:    [[LV2:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[LV2_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[LV2]] to i32*
+// CHECK-NEXT:    [[LA:%.*]] = alloca [100 x i32], align 4, addrspace(5)
+// CHECK-NEXT:    [[LA_ASCAST:%.*]] = addrspacecast [100 x i32] addrspace(5)* [[LA]] to [100 x i32]*
+// CHECK-NEXT:    [[LP1:%.*]] = alloca i32*, align 8, addrspace(5)
+// CHECK-NEXT:    [[LP1_ASCAST:%.*]] = addrspacecast i32* addrspace(5)* [[LP1]] to i32**
+// CHECK-NEXT:    [[LP2:%.*]] = alloca i32*, align 8, addrspace(5)
+// CHECK-NEXT:    [[LP2_ASCAST:%.*]] = addrspacecast i32* addrspace(5)* [[LP2]] to i32**
+// CHECK-NEXT:    [[LVC:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[LVC_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[LVC]] to i32*
+// CHECK-NEXT:    store i32 1, i32* [[LV1_ASCAST]], align 4
+// CHECK-NEXT:    store i32 2, i32* [[LV2_ASCAST]], align 4
+// CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[LA_ASCAST]], i64 0, i64 0
+// CHECK-NEXT:    store i32 3, i32* [[ARRAYIDX]], align 4
+// CHECK-NEXT:    store i32* [[LV1_ASCAST]], i32** [[LP1_ASCAST]], align 8
+// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[LA_ASCAST]], i64 0, i64 0
+// CHECK-NEXT:    store i32* [[ARRAYDECAY]], i32** [[LP2_ASCAST]], align 8
+// CHECK-NEXT:    call void @_Z5func1Pi(i32* [[LV1_ASCAST]])
+// CHECK-NEXT:    store i32 4, i32* [[LVC_ASCAST]], align 4
+// CHECK-NEXT:    store i32 4, i32* [[LV1_ASCAST]], align 4
+// CHECK-NEXT:    ret void
+//
 void func2(void) {
-  // CHECK: %lv1 = alloca i32, align 4, addrspace(5)
-  // CHECK: %[[r0:.*]] = addrspacecast i32 addrspace(5)* %lv1 to i32*
-  // CHECK: %lv2 = alloca i32, align 4, addrspace(5)
-  // CHECK: %[[r1:.*]] = addrspacecast i32 addrspace(5)* %lv2 to i32*
-  // CHECK: %la = alloca [100 x i32], align 4, addrspace(5)
-  // CHECK: %[[r2:.*]] = addrspacecast [100 x i32] addrspace(5)* %la to [100 x i32]*
-  // CHECK: %lp1 = alloca i32*, align 8, addrspace(5)
-  // CHECK: %[[r3:.*]] = addrspacecast i32* addrspace(5)* %lp1 to i32**
-  // CHECK: %lp2 = alloca i32*, align 8, addrspace(5)
-  // CHECK: %[[r4:.*]] = addrspacecast i32* addrspace(5)* %lp2 to i32**
-  // CHECK: %lvc = alloca i32, align 4, addrspace(5)
-  // CHECK: %[[r5:.*]] = addrspacecast i32 addrspace(5)* %lvc to i32*
-
-  // CHECK: store i32 1, i32* %[[r0]]
+
   int lv1;
   lv1 = 1;
-  // CHECK: store i32 2, i32* %[[r1]]
   int lv2 = 2;
 
-  // CHECK: %[[arrayidx:.*]] = getelementptr inbounds [100 x i32], [100 x i32]* %[[r2]], i64 0, i64 0
-  // CHECK: store i32 3, i32* %[[arrayidx]], align 4
   int la[100];
   la[0] = 3;
 
-  // CHECK: store i32* %[[r0]], i32** %[[r3]], align 8
   int *lp1 = &lv1;
 
-  // CHECK: %[[arraydecay:.*]] = getelementptr inbounds [100 x i32], [100 x i32]* %[[r2]], i64 0, i64 0
-  // CHECK: store i32* %[[arraydecay]], i32** %[[r4]], align 8
   int *lp2 = la;
 
-  // CHECK: call void @_Z5func1Pi(i32* %[[r0]])
   func1(&lv1);
 
-  // CHECK: store i32 4, i32* %[[r5]]
-  // CHECK: store i32 4, i32* %[[r0]]
   const int lvc = 4;
   lv1 = lvc;
 }
@@ -63,38 +70,62 @@ public:
   }
 };
 
-// CHECK-LABEL: define{{.*}} void @_Z5func3v
+// CHECK-LABEL: @_Z5func3v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[A:%.*]] = alloca [[CLASS_A:%.*]], align 4, addrspace(5)
+// CHECK-NEXT:    [[A_ASCAST:%.*]] = addrspacecast [[CLASS_A]] addrspace(5)* [[A]] to %class.A*
+// CHECK-NEXT:    call void @_ZN1AC1Ev(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
+// CHECK-NEXT:    call void @_ZN1AD1Ev(%class.A* nonnull align 4 dereferenceable(4) [[A_ASCAST]])
+// CHECK-NEXT:    ret void
+//
 void func3() {
-  // CHECK: %[[a:.*]] = alloca %class.A, align 4, addrspace(5)
-  // CHECK: %[[r0:.*]] = addrspacecast %class.A addrspace(5)* %[[a]] to %class.A*
-  // CHECK: call void @_ZN1AC1Ev(%class.A* {{[^,]*}} %[[r0]])
-  // CHECK: call void @_ZN1AD1Ev(%class.A* {{[^,]*}} %[[r0]])
   A a;
 }
 
-// CHECK-LABEL: define{{.*}} void @_Z5func4i
+// CHECK-LABEL: @_Z5func4i(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X_ADDR]] to i32*
+// CHECK-NEXT:    store i32 [[X:%.*]], i32* [[X_ADDR_ASCAST]], align 4
+// CHECK-NEXT:    call void @_Z5func1Pi(i32* [[X_ADDR_ASCAST]])
+// CHECK-NEXT:    ret void
+//
 void func4(int x) {
-  // CHECK: %[[x_addr:.*]] = alloca i32, align 4, addrspace(5)
-  // CHECK: %[[r0:.*]] = addrspacecast i32 addrspace(5)* %[[x_addr]] to i32*
-  // CHECK: store i32 %x, i32* %[[r0]], align 4
-  // CHECK: call void @_Z5func1Pi(i32* %[[r0]])
   func1(&x);
 }
 
-// CHECK-LABEL: define{{.*}} void @_Z5func5v
+// CHECK-LABEL: @_Z5func5v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[X:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[X_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X]] to i32*
+// CHECK-NEXT:    ret void
+//
 void func5() {
   return;
   int x = 0;
 }
 
-// CHECK-LABEL: define{{.*}} void @_Z5func6v
+// CHECK-LABEL: @_Z5func6v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[X:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[X_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X]] to i32*
+// CHECK-NEXT:    ret void
+//
 void func6() {
   return;
   int x;
 }
 
-// CHECK-LABEL: define{{.*}} void @_Z5func7v
 extern void use(int *);
+// CHECK-LABEL: @_Z5func7v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[X:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[X_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X]] to i32*
+// CHECK-NEXT:    br label [[LATER:%.*]]
+// CHECK:       later:
+// CHECK-NEXT:    call void @_Z3usePi(i32* [[X_ASCAST]])
+// CHECK-NEXT:    ret void
+//
 void func7() {
   goto later;
   int x;
@@ -102,4 +133,3 @@ later:
   use(&x);
 }
 
-// CHECK-NOT: !opencl.ocl.version