diff options
| author | Sirui Mu <msrlancern@gmail.com> | 2025-10-14 21:29:08 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-14 21:29:08 +0800 |
| commit | 7e59abd079cb2eb9fbce3106eb285abf40561748 (patch) | |
| tree | bce74e20868e8641b59ab813525482c2ee84c8c1 /clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | |
| parent | 83ac8084385aa8b08bb9050a16add6c44432e8f1 (diff) | |
[CIR][NFC] Update existing atomic ops to match assembly conventions (#161543)
This patch updates the definitions of `cir.atomic.xchg` and
`cir.atomic.cmpxchg` to make them follow the established CIR assembly
conventions. Some other minor changes are also made along the way:
- The verifier for `cir.atomic.cmpxchg` is now fully declared in
TableGen.
- The `Op` suffix is appended to `CIR_AtomicXchg` and
`CIR_AtomicCmpXchg` to follow the naming conventions for TableGen
operation records.
Diffstat (limited to 'clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp')
| -rw-r--r-- | clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index f0d73ac87238..3abba3d095f2 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -694,8 +694,8 @@ getLLVMMemOrder(std::optional<cir::MemOrder> memorder) { llvm_unreachable("unknown memory order"); } -mlir::LogicalResult CIRToLLVMAtomicCmpXchgLowering::matchAndRewrite( - cir::AtomicCmpXchg op, OpAdaptor adaptor, +mlir::LogicalResult CIRToLLVMAtomicCmpXchgOpLowering::matchAndRewrite( + cir::AtomicCmpXchgOp op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) const { mlir::Value expected = adaptor.getExpected(); mlir::Value desired = adaptor.getDesired(); @@ -719,8 +719,8 @@ mlir::LogicalResult CIRToLLVMAtomicCmpXchgLowering::matchAndRewrite( return mlir::success(); } -mlir::LogicalResult CIRToLLVMAtomicXchgLowering::matchAndRewrite( - cir::AtomicXchg op, OpAdaptor adaptor, +mlir::LogicalResult CIRToLLVMAtomicXchgOpLowering::matchAndRewrite( + cir::AtomicXchgOp op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) const { assert(!cir::MissingFeatures::atomicSyncScopeID()); mlir::LLVM::AtomicOrdering llvmOrder = getLLVMMemOrder(adaptor.getMemOrder()); |
