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| author | Shawn K <kimshawn02@icloud.com> | 2025-10-23 05:28:35 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-23 20:28:35 +0800 |
| commit | 3107c2fe94e9ec4b406eb137ca95097f57a85507 (patch) | |
| tree | 7f2f10601c71c8569f6de765f1ee843103fa64a8 /clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | |
| parent | 0591297c8aa123d9503e4706b5c45617536ec882 (diff) | |
[CIR] Upstream handling for __builtin_prefetch (#164387)
Fix #163886
Diffstat (limited to 'clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp')
| -rw-r--r-- | clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index a30ae02c895c..5a6193fa8d84 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -1695,6 +1695,15 @@ static uint64_t getTypeSize(mlir::Type type, mlir::Operation &op) { return llvm::divideCeil(layout.getTypeSizeInBits(type), 8); } +mlir::LogicalResult CIRToLLVMPrefetchOpLowering::matchAndRewrite( + cir::PrefetchOp op, OpAdaptor adaptor, + mlir::ConversionPatternRewriter &rewriter) const { + rewriter.replaceOpWithNewOp<mlir::LLVM::Prefetch>( + op, adaptor.getAddr(), adaptor.getIsWrite(), adaptor.getLocality(), + /*DataCache=*/1); + return mlir::success(); +} + mlir::LogicalResult CIRToLLVMPtrDiffOpLowering::matchAndRewrite( cir::PtrDiffOp op, OpAdaptor adaptor, mlir::ConversionPatternRewriter &rewriter) const { |