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| author | Rahul Joshi <rjoshi@nvidia.com> | 2025-04-18 05:01:01 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-04-18 05:01:01 -0700 |
| commit | e1b14d4e1c8ecca73e13a0629960d530e336a0d8 (patch) | |
| tree | 907f36e06c0d246b0d7b56683abf72619ec92f22 | |
| parent | 6462fad3d04d1cc6ceda303a6525742c8b911e79 (diff) | |
[Clang][GPU] Fix unit test for NVPTX tid.x intrinsic (#136297)
- llvm.nvvm.read.ptx.sreg.tid.x does not have the result range attribute
yet.
| -rw-r--r-- | clang/test/Headers/gpuintrin_lang.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/clang/test/Headers/gpuintrin_lang.c b/clang/test/Headers/gpuintrin_lang.c index ab660ac5c8a4..b804d4607150 100644 --- a/clang/test/Headers/gpuintrin_lang.c +++ b/clang/test/Headers/gpuintrin_lang.c @@ -36,7 +36,7 @@ __device__ int foo() { return __gpu_thread_id_x(); } // CUDA-LABEL: define dso_local i32 @foo( // CUDA-SAME: ) #[[ATTR0:[0-9]+]] { // CUDA-NEXT: [[ENTRY:.*:]] -// CUDA-NEXT: [[TMP0:%.*]] = call range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() +// CUDA-NEXT: [[TMP0:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() // CUDA-NEXT: ret i32 [[TMP0]] // // HIP-LABEL: define dso_local i32 @foo( |