diff options
Diffstat (limited to 'sysdeps/aarch64/fpu/expf_advsimd.c')
| -rw-r--r-- | sysdeps/aarch64/fpu/expf_advsimd.c | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/sysdeps/aarch64/fpu/expf_advsimd.c b/sysdeps/aarch64/fpu/expf_advsimd.c index f1e93b8490..c76dfe6517 100644 --- a/sysdeps/aarch64/fpu/expf_advsimd.c +++ b/sysdeps/aarch64/fpu/expf_advsimd.c @@ -24,9 +24,7 @@ static const struct data float32x4_t c1, c3, c4, inv_ln2; float ln2_hi, ln2_lo, c0, c2; uint32x4_t exponent_bias, special_offset, special_bias; -#if !WANT_SIMD_EXCEPT float32x4_t special_bound, scale_thresh; -#endif } data = { /* maxerr: 1.45358 +0.5 ulp. */ .c0 = 0x1.0e4020p-7f, @@ -40,30 +38,12 @@ static const struct data .exponent_bias = V4 (0x3f800000), .special_offset = V4 (0x82000000), .special_bias = V4 (0x7f000000), -#if !WANT_SIMD_EXCEPT .special_bound = V4 (126.0f), .scale_thresh = V4 (192.0f), -#endif }; #define C(i) d->poly[i] -#if WANT_SIMD_EXCEPT - -# define TinyBound v_u32 (0x20000000) /* asuint (0x1p-63). */ -# define BigBound v_u32 (0x42800000) /* asuint (0x1p6). */ -# define SpecialBound v_u32 (0x22800000) /* BigBound - TinyBound. */ - -static float32x4_t VPCS_ATTR NOINLINE -special_case (float32x4_t x, float32x4_t y, uint32x4_t cmp) -{ - /* If fenv exceptions are to be triggered correctly, fall back to the scalar - routine to special lanes. */ - return v_call_f32 (expf, x, y, cmp); -} - -#else - static float32x4_t VPCS_ATTR NOINLINE special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1, float32x4_t scale, const struct data *d) @@ -82,27 +62,11 @@ special_case (float32x4_t poly, float32x4_t n, uint32x4_t e, uint32x4_t cmp1, return vbslq_f32 (cmp2, r2, r); } -#endif - float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (exp) (float32x4_t x) { const struct data *d = ptr_barrier (&data); float32x4_t ln2_c02 = vld1q_f32 (&d->ln2_hi); -#if WANT_SIMD_EXCEPT - /* asuint(x) - TinyBound >= BigBound - TinyBound. */ - uint32x4_t cmp = vcgeq_u32 ( - vsubq_u32 (vandq_u32 (vreinterpretq_u32_f32 (x), v_u32 (0x7fffffff)), - TinyBound), - SpecialBound); - float32x4_t xm = x; - /* If any lanes are special, mask them with 1 and retain a copy of x to allow - special case handler to fix special lanes later. This is only necessary if - fenv exceptions are to be triggered correctly. */ - if (__glibc_unlikely (v_any_u32 (cmp))) - x = vbslq_f32 (cmp, v_f32 (1), x); -#endif - /* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)] x = ln2*n + r, with r in [-ln2/2, ln2/2]. */ float32x4_t n = vrndaq_f32 (vmulq_f32 (x, d->inv_ln2)); @@ -111,9 +75,7 @@ float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (exp) (float32x4_t x) uint32x4_t e = vshlq_n_u32 (vreinterpretq_u32_s32 (vcvtq_s32_f32 (n)), 23); float32x4_t scale = vreinterpretq_f32_u32 (vaddq_u32 (e, d->exponent_bias)); -#if !WANT_SIMD_EXCEPT uint32x4_t cmp = vcagtq_f32 (n, d->special_bound); -#endif float32x4_t r2 = vmulq_f32 (r, r); float32x4_t p = vfmaq_laneq_f32 (d->c1, r, ln2_c02, 2); @@ -123,11 +85,7 @@ float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (exp) (float32x4_t x) float32x4_t poly = vfmaq_f32 (p, q, r2); if (__glibc_unlikely (v_any_u32 (cmp))) -#if WANT_SIMD_EXCEPT - return special_case (xm, vfmaq_f32 (scale, poly, scale), cmp); -#else return special_case (poly, n, e, cmp, scale, d); -#endif return vfmaq_f32 (scale, poly, scale); } |