x86: Remove obsolete "*&" GCC asm memory operand workaround

GCC now accept plain variable names as valid lvalues for "m"
constraints, automatically spilling locals to memory if necessary.
The long-standing "*&" pattern was originally used as a defensive
workaround for older compiler versions that rejected operands
such as:

     asm ("incl %0" : "+m"(x));

with errors like "memory input is not directly addressable".

Modern compilers (GCC >= 9) reliably generate correct code
without the workaround, and the resulting assembly is identical.

No functional changes intended.

Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Reviewed-by: Florian Weimer <fweimer@redhat.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>

14 files changed, 35 insertions, 35 deletions

diff --git a/sysdeps/x86_64/fpu/fclrexcpt.c b/sysdeps/x86_64/fpu/fclrexcpt.c
index 3bbb5a2b48..1ce14ece14 100644
--- a/sysdeps/x86_64/fpu/fclrexcpt.c
+++ b/sysdeps/x86_64/fpu/fclrexcpt.c
@@ -29,22 +29,22 @@ __feclearexcept (int excepts)
 
   /* Bah, we have to clear selected exceptions.  Since there is no
      `fldsw' instruction we have to do it the hard way.  */
-  __asm__ ("fnstenv %0" : "=m" (*&temp));
+  __asm__ ("fnstenv %0" : "=m" (temp));
 
   /* Clear the relevant bits.  */
   temp.__status_word &= excepts ^ FE_ALL_EXCEPT;
 
   /* Put the new data in effect.  */
-  __asm__ ("fldenv %0" : : "m" (*&temp));
+  __asm__ ("fldenv %0" : : "m" (temp));
 
   /* And the same procedure for SSE.  */
-  __asm__ ("stmxcsr %0" : "=m" (*&mxcsr));
+  __asm__ ("stmxcsr %0" : "=m" (mxcsr));
 
   /* Clear the relevant bits.  */
   mxcsr &= ~excepts;
 
   /* And put them into effect.  */
-  __asm__ ("ldmxcsr %0" : : "m" (*&mxcsr));
+  __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
 
   /* Success.  */
   return 0;
diff --git a/sysdeps/x86_64/fpu/fedisblxcpt.c b/sysdeps/x86_64/fpu/fedisblxcpt.c
index 6d87dfe71e..873ee65f4e 100644
--- a/sysdeps/x86_64/fpu/fedisblxcpt.c
+++ b/sysdeps/x86_64/fpu/fedisblxcpt.c
@@ -27,19 +27,19 @@ fedisableexcept (int excepts)
   excepts &= FE_ALL_EXCEPT;
 
   /* Get the current control word of the x87 FPU.  */
-  __asm__ ("fstcw %0" : "=m" (*&new_exc));
+  __asm__ ("fstcw %0" : "=m" (new_exc));
 
   old_exc = (~new_exc) & FE_ALL_EXCEPT;
 
   new_exc |= excepts;
-  __asm__ ("fldcw %0" : : "m" (*&new_exc));
+  __asm__ ("fldcw %0" : : "m" (new_exc));
 
   /* And now the same for the SSE MXCSR register.  */
-  __asm__ ("stmxcsr %0" : "=m" (*&new));
+  __asm__ ("stmxcsr %0" : "=m" (new));
 
   /* The SSE exception masks are shifted by 7 bits.  */
   new |= excepts << 7;
-  __asm__ ("ldmxcsr %0" : : "m" (*&new));
+  __asm__ ("ldmxcsr %0" : : "m" (new));
 
   return old_exc;
 }
diff --git a/sysdeps/x86_64/fpu/feenablxcpt.c b/sysdeps/x86_64/fpu/feenablxcpt.c
index 36a9bcd50f..81630841c7 100644
--- a/sysdeps/x86_64/fpu/feenablxcpt.c
+++ b/sysdeps/x86_64/fpu/feenablxcpt.c
@@ -27,19 +27,19 @@ feenableexcept (int excepts)
   excepts &= FE_ALL_EXCEPT;
 
   /* Get the current control word of the x87 FPU.  */
-  __asm__ ("fstcw %0" : "=m" (*&new_exc));
+  __asm__ ("fstcw %0" : "=m" (new_exc));
 
   old_exc = (~new_exc) & FE_ALL_EXCEPT;
 
   new_exc &= ~excepts;
-  __asm__ ("fldcw %0" : : "m" (*&new_exc));
+  __asm__ ("fldcw %0" : : "m" (new_exc));
 
   /* And now the same for the SSE MXCSR register.  */
-  __asm__ ("stmxcsr %0" : "=m" (*&new));
+  __asm__ ("stmxcsr %0" : "=m" (new));
 
   /* The SSE exception masks are shifted by 7 bits.  */
   new &= ~(excepts << 7);
-  __asm__ ("ldmxcsr %0" : : "m" (*&new));
+  __asm__ ("ldmxcsr %0" : : "m" (new));
 
   return old_exc;
 }
diff --git a/sysdeps/x86_64/fpu/fegetexcept.c b/sysdeps/x86_64/fpu/fegetexcept.c
index a34745eabb..efbebd0363 100644
--- a/sysdeps/x86_64/fpu/fegetexcept.c
+++ b/sysdeps/x86_64/fpu/fegetexcept.c
@@ -24,7 +24,7 @@ fegetexcept (void)
   unsigned short int exc;
 
   /* Get the current control word.  */
-  __asm__ ("fstcw %0" : "=m" (*&exc));
+  __asm__ ("fstcw %0" : "=m" (exc));
 
   return (~exc) & FE_ALL_EXCEPT;
 }
diff --git a/sysdeps/x86_64/fpu/fegetround.c b/sysdeps/x86_64/fpu/fegetround.c
index 6c01346a5b..9537cd3142 100644
--- a/sysdeps/x86_64/fpu/fegetround.c
+++ b/sysdeps/x86_64/fpu/fegetround.c
@@ -25,7 +25,7 @@ __fegetround (void)
   /* We only check the x87 FPU unit.  The SSE unit should be the same
      - and if it's not the same there's no way to signal it.  */
 
-  __asm__ ("fnstcw %0" : "=m" (*&cw));
+  __asm__ ("fnstcw %0" : "=m" (cw));
 
   return cw & 0xc00;
 }
diff --git a/sysdeps/x86_64/fpu/feholdexcpt.c b/sysdeps/x86_64/fpu/feholdexcpt.c
index 958aa3668e..446e98d19f 100644
--- a/sysdeps/x86_64/fpu/feholdexcpt.c
+++ b/sysdeps/x86_64/fpu/feholdexcpt.c
@@ -32,7 +32,7 @@ __feholdexcept (fenv_t *envp)
 
   /* Set the SSE MXCSR register.  */
   mxcsr = (envp->__mxcsr | 0x1f80) & ~0x3f;
-  __asm__ ("ldmxcsr %0" : : "m" (*&mxcsr));
+  __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
 
   return 0;
 }
diff --git a/sysdeps/x86_64/fpu/fesetenv.c b/sysdeps/x86_64/fpu/fesetenv.c
index a50c704a5f..0ab3059889 100644
--- a/sysdeps/x86_64/fpu/fesetenv.c
+++ b/sysdeps/x86_64/fpu/fesetenv.c
@@ -36,7 +36,7 @@ __fesetenv (const fenv_t *envp)
      Therefore, we get the current environment and replace the values
      we want to use from the environment specified by the parameter.  */
   __asm__ ("fnstenv %0\n"
-	   "stmxcsr %1" : "=m" (*&temp), "=m" (*&temp.__mxcsr));
+	   "stmxcsr %1" : "=m" (temp), "=m" (temp.__mxcsr));
 
   if (envp == FE_DFL_ENV)
     {
diff --git a/sysdeps/x86_64/fpu/fesetexcept.c b/sysdeps/x86_64/fpu/fesetexcept.c
index 15de76d544..22ce321bc3 100644
--- a/sysdeps/x86_64/fpu/fesetexcept.c
+++ b/sysdeps/x86_64/fpu/fesetexcept.c
@@ -23,9 +23,9 @@ fesetexcept (int excepts)
 {
   unsigned int mxcsr;
 
-  __asm__ ("stmxcsr %0" : "=m" (*&mxcsr));
+  __asm__ ("stmxcsr %0" : "=m" (mxcsr));
   mxcsr |= excepts & FE_ALL_EXCEPT;
-  __asm__ ("ldmxcsr %0" : : "m" (*&mxcsr));
+  __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
 
   return 0;
 }
diff --git a/sysdeps/x86_64/fpu/fesetround.c b/sysdeps/x86_64/fpu/fesetround.c
index 59665e2443..dda635ed19 100644
--- a/sysdeps/x86_64/fpu/fesetround.c
+++ b/sysdeps/x86_64/fpu/fesetround.c
@@ -29,17 +29,17 @@ __fesetround (int round)
     return 1;
 
   /* First set the x87 FPU.  */
-  asm ("fnstcw %0" : "=m" (*&cw));
+  asm ("fnstcw %0" : "=m" (cw));
   cw &= ~0xc00;
   cw |= round;
-  asm ("fldcw %0" : : "m" (*&cw));
+  asm ("fldcw %0" : : "m" (cw));
 
   /* And now the MSCSR register for SSE, the precision is at different bit
      positions in the different units, we need to shift it 3 bits.  */
-  asm ("stmxcsr %0" : "=m" (*&mxcsr));
+  asm ("stmxcsr %0" : "=m" (mxcsr));
   mxcsr &= ~ 0x6000;
   mxcsr |= round << 3;
-  asm ("ldmxcsr %0" : : "m" (*&mxcsr));
+  asm ("ldmxcsr %0" : : "m" (mxcsr));
 
   return 0;
 }
diff --git a/sysdeps/x86_64/fpu/feupdateenv.c b/sysdeps/x86_64/fpu/feupdateenv.c
index 79a3b5dc43..72abc188e1 100644
--- a/sysdeps/x86_64/fpu/feupdateenv.c
+++ b/sysdeps/x86_64/fpu/feupdateenv.c
@@ -25,7 +25,7 @@ __feupdateenv (const fenv_t *envp)
   unsigned int xtemp;
 
   /* Save current exceptions.  */
-  __asm__ ("fnstsw %0\n\tstmxcsr %1" : "=m" (*&temp), "=m" (xtemp));
+  __asm__ ("fnstsw %0\n\tstmxcsr %1" : "=m" (temp), "=m" (xtemp));
   temp = (temp | xtemp) & FE_ALL_EXCEPT;
 
   /* Install new environment.  */
diff --git a/sysdeps/x86_64/fpu/fgetexcptflg.c b/sysdeps/x86_64/fpu/fgetexcptflg.c
index fc4d9b5e0a..d11d3465e2 100644
--- a/sysdeps/x86_64/fpu/fgetexcptflg.c
+++ b/sysdeps/x86_64/fpu/fgetexcptflg.c
@@ -26,7 +26,7 @@ fegetexceptflag (fexcept_t *flagp, int excepts)
 
   /* Get the current exceptions for the x87 FPU and SSE unit.  */
   __asm__ ("fnstsw %0\n"
-	   "stmxcsr %1" : "=m" (*&temp), "=m" (*&mxscr));
+	   "stmxcsr %1" : "=m" (temp), "=m" (mxscr));
 
   *flagp = (temp | mxscr) & FE_ALL_EXCEPT & excepts;
 
diff --git a/sysdeps/x86_64/fpu/fraiseexcpt.c b/sysdeps/x86_64/fpu/fraiseexcpt.c
index 05631b94ce..c340730ed5 100644
--- a/sysdeps/x86_64/fpu/fraiseexcpt.c
+++ b/sysdeps/x86_64/fpu/fraiseexcpt.c
@@ -57,13 +57,13 @@ __feraiseexcept (int excepts)
 
       /* Bah, we have to clear selected exceptions.  Since there is no
 	 `fldsw' instruction we have to do it the hard way.  */
-      __asm__ __volatile__ ("fnstenv %0" : "=m" (*&temp));
+      __asm__ __volatile__ ("fnstenv %0" : "=m" (temp));
 
       /* Set the relevant bits.  */
       temp.__status_word |= FE_OVERFLOW;
 
       /* Put the new data in effect.  */
-      __asm__ __volatile__ ("fldenv %0" : : "m" (*&temp));
+      __asm__ __volatile__ ("fldenv %0" : : "m" (temp));
 
       /* And raise the exception.  */
       __asm__ __volatile__ ("fwait");
@@ -79,13 +79,13 @@ __feraiseexcept (int excepts)
 
       /* Bah, we have to clear selected exceptions.  Since there is no
 	 `fldsw' instruction we have to do it the hard way.  */
-      __asm__ __volatile__ ("fnstenv %0" : "=m" (*&temp));
+      __asm__ __volatile__ ("fnstenv %0" : "=m" (temp));
 
       /* Set the relevant bits.  */
       temp.__status_word |= FE_UNDERFLOW;
 
       /* Put the new data in effect.  */
-      __asm__ __volatile__ ("fldenv %0" : : "m" (*&temp));
+      __asm__ __volatile__ ("fldenv %0" : : "m" (temp));
 
       /* And raise the exception.  */
       __asm__ __volatile__ ("fwait");
@@ -101,13 +101,13 @@ __feraiseexcept (int excepts)
 
       /* Bah, we have to clear selected exceptions.  Since there is no
 	 `fldsw' instruction we have to do it the hard way.  */
-      __asm__ __volatile__ ("fnstenv %0" : "=m" (*&temp));
+      __asm__ __volatile__ ("fnstenv %0" : "=m" (temp));
 
       /* Set the relevant bits.  */
       temp.__status_word |= FE_INEXACT;
 
       /* Put the new data in effect.  */
-      __asm__ __volatile__ ("fldenv %0" : : "m" (*&temp));
+      __asm__ __volatile__ ("fldenv %0" : : "m" (temp));
 
       /* And raise the exception.  */
       __asm__ __volatile__ ("fwait");
diff --git a/sysdeps/x86_64/fpu/fsetexcptflg.c b/sysdeps/x86_64/fpu/fsetexcptflg.c
index adb8d77316..9dec41c1b3 100644
--- a/sysdeps/x86_64/fpu/fsetexcptflg.c
+++ b/sysdeps/x86_64/fpu/fsetexcptflg.c
@@ -35,22 +35,22 @@ fesetexceptflag (const fexcept_t *flagp, int excepts)
 
   /* Get the current x87 FPU environment.  We have to do this since we
      cannot separately set the status word.  */
-  __asm__ ("fnstenv %0" : "=m" (*&temp));
+  __asm__ ("fnstenv %0" : "=m" (temp));
 
   /* Clear relevant flags.  */
   temp.__status_word &= ~(excepts & ~ *flagp);
 
   /* Store the new status word (along with the rest of the environment).  */
-  __asm__ ("fldenv %0" : : "m" (*&temp));
+  __asm__ ("fldenv %0" : : "m" (temp));
 
   /* And now similarly for SSE.  */
-  __asm__ ("stmxcsr %0" : "=m" (*&mxcsr));
+  __asm__ ("stmxcsr %0" : "=m" (mxcsr));
 
   /* Clear or set relevant flags.  */
   mxcsr ^= (mxcsr ^ *flagp) & excepts;
 
   /* Put the new data in effect.  */
-  __asm__ ("ldmxcsr %0" : : "m" (*&mxcsr));
+  __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
 
   /* Success.  */
   return 0;
diff --git a/sysdeps/x86_64/fpu/ftestexcept.c b/sysdeps/x86_64/fpu/ftestexcept.c
index 87a851d4b4..f2aae5e66c 100644
--- a/sysdeps/x86_64/fpu/ftestexcept.c
+++ b/sysdeps/x86_64/fpu/ftestexcept.c
@@ -26,7 +26,7 @@ __fetestexcept (int excepts)
 
   /* Get current exceptions.  */
   __asm__ ("fnstsw %0\n"
-	   "stmxcsr %1" : "=m" (*&temp), "=m" (*&mxscr));
+	   "stmxcsr %1" : "=m" (temp), "=m" (mxscr));
 
   return (temp | mxscr) & excepts & FE_ALL_EXCEPT;
 }