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authorDylan Fleming <Dylan.Fleming@arm.com>2025-11-18 15:34:41 +0000
committerWilco Dijkstra <wilco.dijkstra@arm.com>2025-11-18 15:51:15 +0000
commitfd1d642ef80d81fdd4a22c628183a0bdc0a0c23e (patch)
tree391dfb203bf19affa5ba01a607a6bb55ac67e783 /sysdeps/aarch64/fpu/v_log1p_inline.h
parentbb6519de1e6fe73d79bc71588ec4e5668907f080 (diff)
AArch64: Remove WANT_SIMD_EXCEPT from aarch64 AdvSIMD math routines
Remove legacy code for supporting an old Arm Optimised Routines deprecated feature for throwing SIMD Exceptions. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Diffstat (limited to 'sysdeps/aarch64/fpu/v_log1p_inline.h')
-rw-r--r--sysdeps/aarch64/fpu/v_log1p_inline.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/aarch64/fpu/v_log1p_inline.h b/sysdeps/aarch64/fpu/v_log1p_inline.h
index d38f8fb3c5..66d33724dc 100644
--- a/sysdeps/aarch64/fpu/v_log1p_inline.h
+++ b/sysdeps/aarch64/fpu/v_log1p_inline.h
@@ -113,7 +113,7 @@ log1p_inline (float64x2_t x, const struct v_log1p_data *d)
/* Shortcut if k is 0 - set correction term to 0 and f to x. The result is
that the approximation is solely the polynomial. */
uint64x2_t k0 = vceqzq_f64 (k);
- cm = v_zerofy_f64 (cm, k0);
+ cm = vbslq_f64 (k0, v_f64 (0), cm);
f = vbslq_f64 (k0, x, f);
#endif