diff options
| author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2025-09-11 10:49:46 -0300 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2025-11-04 04:14:01 -0300 |
| commit | 95a0ad1ea1e1b4fc66c1006c1f7231be1de04453 (patch) | |
| tree | f4a8ffaafc1902a5e30fc5053bcdc4dd9def5ded /include | |
| parent | 304b22d7f97c23b068d8058986a2afc05da17ffc (diff) | |
atomic: Consolidate atomic_write_barrier implementation
All ABIs, except alpha and sparc, define it to
atomic_full_barrier/__sync_synchronize, which can be mapped to
__atomic_thread_fence (__ATOMIC_RELEASE).
For alpha, it uses a 'wmb' which does not map to any of C11
barriers.
For sparc it uses a stronger 'member #LoadStore | #StoreStore',
where the release barrier maps to just 'membar #StoreLoad'. The
patch keeps the sparc definition.
For PowerPC, it allows the use of lwsync for additional chips
(since _ARCH_PWR4 does not cover all chips that support it).
Tested on aarch64-linux-gnu.
Co-authored-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/atomic.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/atomic.h b/include/atomic.h index 866c11c11f..3dfefc2c18 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -113,7 +113,7 @@ #ifndef atomic_write_barrier -# define atomic_write_barrier() atomic_full_barrier () +# define atomic_write_barrier() __atomic_thread_fence (__ATOMIC_RELEASE) #endif |