diff options
| author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2025-11-13 14:26:08 -0300 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2025-11-14 14:05:20 -0300 |
| commit | 7fec8a5de6826ef9ae440238d698f0fe5a5fb372 (patch) | |
| tree | 8e4cd2b3bbc291ffc6714692669ca9b9d69abbad /include | |
| parent | 5bdf3c909274a4796b848d7595a025dca1951570 (diff) | |
Revert __HAVE_64B_ATOMICS configure check
The 53807741fb44edb8e7c094cb5e7d4ff4e92a6ec1 added a configure check
for 64-bit atomic operations that were not previously enabled on some
32-bit ABIs.
However, the NPTL semaphore code casts a sem_t to a new_sem and issues
a 64-bit atomic operation for __HAVE_64B_ATOMICS. Since sem_t has
32-bit alignment on 32-bit architectures, this prevents the use of
64-bit atomics even if the ABI supports them.
Assume 64-bit atomic support from __WORDSIZE, which maps to how glibc
defines it before the broken change. Also rename __HAVE_64B_ATOMICS
to USE_64B_ATOMICS to define better the flag meaning.
Checked on x86_64-linux-gnu and i686-linux-gnu.
Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/atomic.h | 9 | ||||
| -rw-r--r-- | include/atomic_wide_counter.h | 6 |
2 files changed, 5 insertions, 10 deletions
diff --git a/include/atomic.h b/include/atomic.h index bac7423ec5..ed0dfbde3f 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -117,11 +117,6 @@ #endif -/* This is equal to 1 iff the architecture supports 64b atomic operations. */ -#ifndef __HAVE_64B_ATOMICS -#error Unable to determine if 64-bit atomics are present. -#endif - /* The following functions are a subset of the atomic operations provided by C11. Usually, a function named atomic_OP_MO(args) is equivalent to C11's atomic_OP_explicit(args, memory_order_MO); exceptions noted below. */ @@ -129,7 +124,7 @@ /* We require 32b atomic operations; some archs also support 64b atomic operations. */ void __atomic_link_error (void); -# if __HAVE_64B_ATOMICS == 1 +# if USE_64B_ATOMICS == 1 # define __atomic_check_size(mem) \ if ((sizeof (*mem) != 4) && (sizeof (*mem) != 8)) \ __atomic_link_error (); @@ -142,7 +137,7 @@ void __atomic_link_error (void); need other atomic operations of such sizes, and restricting the support to loads and stores makes this easier for archs that do not have native support for atomic operations to less-than-word-sized data. */ -# if __HAVE_64B_ATOMICS == 1 +# if USE_64B_ATOMICS == 1 # define __atomic_check_size_ls(mem) \ if ((sizeof (*mem) != 1) && (sizeof (*mem) != 2) && (sizeof (*mem) != 4) \ && (sizeof (*mem) != 8)) \ diff --git a/include/atomic_wide_counter.h b/include/atomic_wide_counter.h index abf660f7d0..5b1979e601 100644 --- a/include/atomic_wide_counter.h +++ b/include/atomic_wide_counter.h @@ -22,7 +22,7 @@ #include <atomic.h> #include <bits/atomic_wide_counter.h> -#if __HAVE_64B_ATOMICS +#if USE_64B_ATOMICS static inline uint64_t __atomic_wide_counter_load_relaxed (__atomic_wide_counter *c) @@ -65,7 +65,7 @@ __atomic_wide_counter_fetch_xor_release (__atomic_wide_counter *c, return atomic_fetch_xor_release (&c->__value64, val); } -#else /* !__HAVE_64B_ATOMICS */ +#else /* !USE_64B_ATOMICS */ uint64_t __atomic_wide_counter_load_relaxed (__atomic_wide_counter *c) attribute_hidden; @@ -98,6 +98,6 @@ __atomic_wide_counter_add_relaxed (__atomic_wide_counter *c, __atomic_wide_counter_fetch_add_relaxed (c, val); } -#endif /* !__HAVE_64B_ATOMICS */ +#endif /* !USE_64B_ATOMICS */ #endif /* _ATOMIC_WIDE_COUNTER_H */ |