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| author | zhaozhou <zhaozhou@loongson.cn> | 2025-11-14 11:18:46 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2025-11-22 14:46:47 +0800 |
| commit | 4962d1309be98585ed05980eb7064dd5cc0d113a (patch) | |
| tree | dc02a63e113fed10af85c55ea6f40c31ed7e00f0 /libjava/classpath/java/util/BitSet.java | |
| parent | 59a5fecfb260456dd60be687491717f3dbdb354f (diff) | |
LoongArch: Optimize V4SImode vec_construct for load index length of two.
Under the V4SImode, the vec_construct with the load index {0, 1, 0, 1}
use vldrepl.d, the vec_construct with the load index {0, 1, 0, 0} use
vldrepl.d and vshuf4i, reduced the usage of scalar load and vinsgr2vr.
gcc/ChangeLog:
* config/loongarch/lsx.md (lsx_vshuf4i_mem_w_0): Add template.
(lsx_vldrepl_merge_w_0): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lsx/lsx-vec-construct-opt.c:
Diffstat (limited to 'libjava/classpath/java/util/BitSet.java')
0 files changed, 0 insertions, 0 deletions