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authorAustin Law <austinkylelaw@gmail.com>2025-11-18 06:51:12 -0700
committerJeff Law <jlaw@ventanamicro.com>2025-11-18 06:53:49 -0700
commit3dc4bcb0cd0b5a6a04e1b5d4857194727b5e01d9 (patch)
treed950a0398bf6ebd8550313d815f0bb2a68381506 /libjava/classpath/java/io/FileNotFoundException.java
parentfacb92812a4ec5c60ef783db6d02c35fa6a21e16 (diff)
[RISC-V] Add cpu and tuning structures for spacemit-x60 design
Per the discussion a couple weeks ago in the patchwork call, I'm submitting the spacemit-x60 basic core and tuning info on Austin's behalf. I know everyone would like to have performance data, but with 8%+ run to run variation with the same binary and ~10hr cycle times for spec2017 (integer ref only), getting data with any degree of confidence is exceedingly hard when the improvements are expected to be in the low single digits. It just takes so many runs to get a reasonable confidence interval. This also does not include the vector pipeline model. I think we know how we want to model it, but it's not really started yet. Per our discussion this (and further twiddles to the tuning/pipeline model) can be made during stage3/stage4 given the low risk of breaking anything. We're also likely going to want to make adjustments to the vector cost structure. Right now it's using the generic cost structure. Overall it looks like the spacemit-x60 has better than expected segment support, but worse than expected stride support. So the trick of using strides to avoid the permute in SATD likely isn't viable (setting aside the unaligned vector element issues). Anyway, the goal is to get the basics in place so that the -mcpu/-mtune options work and we can iterate on finer details. I'll wait for pre-commit CI to do its thing. There's no rush to commit, just to get it submitted. I have no plans to work in Pago Pago tonight to get anything else submitted before the stage1 close deadline. * config/riscv/riscv-cores.def: Add RISCV_TUNE and RISCV_CORE entries for the spacemit-x60 design. * config/riscv/riscv-opts.h (riscv_microarchitecture_type): Add entry for spacemit-x60 design. * config/riscv/riscv.cc (spacemit_x60_tune_info): New tune structure for the spacemit-x60 design. * config/riscv/riscv.md (tune): Add spacemit_x60. Include spacemit-x60.md. * config/riscv/spacemit-x60.md: New file * doc/riscv-mtune.texi: Regenerate. * doc/riscv-mcpu.texi: Regenerate.
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