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authorClaudiu Zissulescu <claziss@gmail.com>2025-11-21 10:46:56 +0200
committerClaudiu Zissulescu <claudiu.zissulescu-ianculescu@oracle.com>2025-11-21 10:52:19 +0200
commit56595464ff06ae7bdba7848f2ae583f2cac5dcac (patch)
tree0045c6aacaa0fd6c2c6749775681b0216c7ae2cc
parentebabae605093e5a31c37ef6e5e3e809f13501f70 (diff)
arc: Use correct input operand for *extvsi_n_0 define_insn_and_split
Correct the split condition of the instruction to happen after reload. Relax operand 1 constrain too. gcc/ChangeLog: * config/arc/arc.md: Modify define_insn_and_split "*extvsi_n_0" gcc/testsuite/ChangeLog: * gcc.target/arc/extvsi-3.c: New test. Co-authored-by: Michiel Derhaeg <michiel@synopsys.com> Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
-rw-r--r--gcc/config/arc/arc.md6
-rw-r--r--gcc/testsuite/gcc.target/arc/extvsi-3.c14
2 files changed, 17 insertions, 3 deletions
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 8f7e5373fdf..55be6ce74da 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -6286,15 +6286,15 @@ archs4x, archs4xd"
(define_insn_and_split "*extvsi_n_0"
[(set (match_operand:SI 0 "register_operand" "=r")
- (sign_extract:SI (match_operand:SI 1 "register_operand" "0")
+ (sign_extract:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:QI 2 "const_int_operand")
(const_int 0)))]
"!TARGET_BARREL_SHIFTER
&& IN_RANGE (INTVAL (operands[2]), 2,
(optimize_insn_for_size_p () ? 28 : 30))"
"#"
- "&& 1"
-[(set (match_dup 0) (and:SI (match_dup 0) (match_dup 3)))
+ "&& reload_completed"
+[(set (match_dup 0) (and:SI (match_dup 1) (match_dup 3)))
(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 4)))
(set (match_dup 0) (minus:SI (match_dup 0) (match_dup 4)))]
{
diff --git a/gcc/testsuite/gcc.target/arc/extvsi-3.c b/gcc/testsuite/gcc.target/arc/extvsi-3.c
new file mode 100644
index 00000000000..2a466f90ed0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/extvsi-3.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-skip-if "avoid conflicts with -mcpu options" { *-*-* } { "-mcpu=*" } { "-mcpu=em" } } */
+/* { dg-options "-O2 -mcpu=em" } */
+struct S { int a : 5; };
+
+/* An extra parameter is added to ensure a different register is used for input and output. */
+int foo (int unused, struct S p)
+{
+ return p.a;
+}
+
+/* { dg-final { scan-assembler "and\\s+r0,r1,31" } } */
+/* { dg-final { scan-assembler "xor\\s+r0,r0,16" } } */
+/* { dg-final { scan-assembler "sub\\s+r0,r0,16" } } */