From bf79d4819edeb54c6cf528db63676110992908a8 Mon Sep 17 00:00:00 2001 From: zhijian lin Date: Thu, 19 Jun 2025 09:22:16 -0400 Subject: [Reland] [PowerPC] frontend get target feature from backend with cpu name (#144594) 1. The PR proceeds with a backend target hook to allow front-ends to determine what target features are available in a compilation based on the CPU name. 2. Fix a backend target feature bug that supports HTM for Power8/9/10/11. However, HTM is only supported on Power8/9 according to the ISA. 3. All target features that are hardcoded in PPC.cpp can be retrieved from the backend target feature. I have double-checked that the hardcoded logic for inferring target features from the CPU in the frontend(PPC.cpp) is the same as in PPC.td. The reland patch addressed the comment https://github.com/llvm/llvm-project/pull/137670#discussion_r2143541120 --- llvm/lib/TargetParser/TargetParser.cpp | 47 ++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'llvm/lib/TargetParser/TargetParser.cpp') diff --git a/llvm/lib/TargetParser/TargetParser.cpp b/llvm/lib/TargetParser/TargetParser.cpp index 7c54901dae47..03f7d3899c2e 100644 --- a/llvm/lib/TargetParser/TargetParser.cpp +++ b/llvm/lib/TargetParser/TargetParser.cpp @@ -18,6 +18,53 @@ using namespace llvm; using namespace AMDGPU; +/// Find KV in array using binary search. +static const BasicSubtargetSubTypeKV * +find(StringRef S, ArrayRef A) { + // Binary search the array + auto F = llvm::lower_bound(A, S); + // If not found then return NULL + if (F == A.end() || StringRef(F->Key) != S) + return nullptr; + // Return the found array item + return F; +} + +/// For each feature that is (transitively) implied by this feature, set it. +static void setImpliedBits(FeatureBitset &Bits, const FeatureBitset &Implies, + ArrayRef FeatureTable) { + // OR the Implies bits in outside the loop. This allows the Implies for CPUs + // which might imply features not in FeatureTable to use this. + Bits |= Implies; + for (const auto &FE : FeatureTable) + if (Implies.test(FE.Value)) + setImpliedBits(Bits, FE.Implies.getAsBitset(), FeatureTable); +} + +std::optional> llvm::getCPUDefaultTargetFeatures( + StringRef CPU, ArrayRef ProcDesc, + ArrayRef ProcFeatures) { + if (CPU.empty()) + return std::nullopt; + + const BasicSubtargetSubTypeKV *CPUEntry = ::find(CPU, ProcDesc); + if (!CPUEntry) + return std::nullopt; + + // Set the features implied by this CPU feature if there is a match. + FeatureBitset Bits; + llvm::StringMap DefaultFeatures; + setImpliedBits(Bits, CPUEntry->Implies.getAsBitset(), ProcFeatures); + + unsigned BitSize = Bits.size(); + for (const BasicSubtargetFeatureKV &FE : ProcFeatures) { + assert(FE.Value < BitSize && "Target Feature is out of range"); + if (Bits[FE.Value]) + DefaultFeatures[FE.Key] = true; + } + return DefaultFeatures; +} + namespace { struct GPUInfo { -- cgit v1.2.3 From 3de01d07c33c10dfefc753c87c0a926fd512425b Mon Sep 17 00:00:00 2001 From: Karlo Basioli Date: Thu, 19 Jun 2025 16:16:03 +0100 Subject: Fix bazel build after #144594, mark variable as potentially unused (#144910) --- llvm/lib/TargetParser/TargetParser.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/TargetParser/TargetParser.cpp') diff --git a/llvm/lib/TargetParser/TargetParser.cpp b/llvm/lib/TargetParser/TargetParser.cpp index 03f7d3899c2e..90791dfb7b7c 100644 --- a/llvm/lib/TargetParser/TargetParser.cpp +++ b/llvm/lib/TargetParser/TargetParser.cpp @@ -56,7 +56,7 @@ std::optional> llvm::getCPUDefaultTargetFeatures( llvm::StringMap DefaultFeatures; setImpliedBits(Bits, CPUEntry->Implies.getAsBitset(), ProcFeatures); - unsigned BitSize = Bits.size(); + [[maybe_unused]] unsigned BitSize = Bits.size(); for (const BasicSubtargetFeatureKV &FE : ProcFeatures) { assert(FE.Value < BitSize && "Target Feature is out of range"); if (Bits[FE.Value]) -- cgit v1.2.3 From 69974658f079cec82a9fc13dd4993ab1e072c811 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Thu, 19 Jun 2025 22:52:51 -0700 Subject: [AMDGPU] Initial support for gfx1250 target. (#144965) This is just a stub for now. --- llvm/lib/TargetParser/TargetParser.cpp | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'llvm/lib/TargetParser/TargetParser.cpp') diff --git a/llvm/lib/TargetParser/TargetParser.cpp b/llvm/lib/TargetParser/TargetParser.cpp index 90791dfb7b7c..49442c30eb44 100644 --- a/llvm/lib/TargetParser/TargetParser.cpp +++ b/llvm/lib/TargetParser/TargetParser.cpp @@ -174,6 +174,7 @@ constexpr GPUInfo AMDGCNGPUs[] = { {{"gfx1153"}, {"gfx1153"}, GK_GFX1153, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP}, {{"gfx1200"}, {"gfx1200"}, GK_GFX1200, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP}, {{"gfx1201"}, {"gfx1201"}, GK_GFX1201, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP}, + {{"gfx1250"}, {"gfx1250"}, GK_GFX1250, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32}, {{"gfx9-generic"}, {"gfx9-generic"}, GK_GFX9_GENERIC, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK}, {{"gfx10-1-generic"}, {"gfx10-1-generic"}, GK_GFX10_1_GENERIC, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP}, @@ -328,6 +329,7 @@ AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) { case GK_GFX1153: return {11, 5, 3}; case GK_GFX1200: return {12, 0, 0}; case GK_GFX1201: return {12, 0, 1}; + case GK_GFX1250: return {12, 5, 0}; // Generic targets return the lowest common denominator // within their family. That is, the ISA that is the most @@ -425,6 +427,33 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T, } else if (T.isAMDGCN()) { AMDGPU::GPUKind Kind = parseArchAMDGCN(GPU); switch (Kind) { + case GK_GFX1250: + Features["ci-insts"] = true; + Features["dot7-insts"] = true; + Features["dot8-insts"] = true; + Features["dl-insts"] = true; + Features["16-bit-insts"] = true; + Features["dpp"] = true; + Features["gfx8-insts"] = true; + Features["gfx9-insts"] = true; + Features["gfx10-insts"] = true; + Features["gfx10-3-insts"] = true; + Features["gfx11-insts"] = true; + Features["gfx12-insts"] = true; + Features["gfx1250-insts"] = true; + Features["bitop3-insts"] = true; + Features["prng-inst"] = true; + Features["fp8-conversion-insts"] = true; + Features["permlane16-swap"] = true; + Features["ashr-pk-insts"] = true; + Features["atomic-buffer-pk-add-bf16-inst"] = true; + Features["atomic-fadd-rtn-insts"] = true; + Features["atomic-buffer-global-pk-add-f16-insts"] = true; + Features["atomic-flat-pk-add-16-insts"] = true; + Features["atomic-global-pk-add-bf16-inst"] = true; + Features["atomic-ds-pk-add-16-insts"] = true; + Features["setprio-inc-wg-inst"] = true; + break; case GK_GFX1201: case GK_GFX1200: case GK_GFX12_GENERIC: @@ -678,6 +707,7 @@ static bool isWave32Capable(StringRef GPU, const Triple &T) { // XXX - What does the member GPU mean if device name string passed here? if (T.isAMDGCN()) { switch (parseArchAMDGCN(GPU)) { + case GK_GFX1250: case GK_GFX1201: case GK_GFX1200: case GK_GFX1153: -- cgit v1.2.3