From c8ea114741cecf9c812b5e90eaa28919328df650 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 27 Jun 2025 21:05:03 +0900 Subject: AMDGPU: Introduce a pass to replace VGPR MFMAs with AGPR (#145024) In gfx90a-gfx950, it's possible to emit MFMAs which use AGPRs or VGPRs for vdst and src2. We do not want to do use the AGPR form, unless required by register pressure as it requires cross bank register copies from most other instructions. Currently we select the AGPR or VGPR version depending on a crude heuristic for whether it's possible AGPRs will be required. We really need the register allocation to be complete to make a good decision, which is what this pass is for. This adds the pass, but does not yet remove the selection patterns for AGPRs. This is a WIP, and NFC-ish. It should be a no-op on any currently selected code. It also does not yet trigger on the real examples of interest, which require handling batches of MFMAs at once. --- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp') diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index d2e4825cf3c8..c3536113e9be 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -534,6 +534,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() { initializeAMDGPULowerModuleLDSLegacyPass(*PR); initializeAMDGPULowerBufferFatPointersPass(*PR); initializeAMDGPUReserveWWMRegsLegacyPass(*PR); + initializeAMDGPURewriteAGPRCopyMFMALegacyPass(*PR); initializeAMDGPURewriteOutArgumentsPass(*PR); initializeAMDGPURewriteUndefForPHILegacyPass(*PR); initializeSIAnnotateControlFlowLegacyPass(*PR); @@ -1577,6 +1578,8 @@ void GCNPassConfig::addOptimizedRegAlloc() { bool GCNPassConfig::addPreRewrite() { if (EnableRegReassign) addPass(&GCNNSAReassignID); + + addPass(&AMDGPURewriteAGPRCopyMFMALegacyID); return true; } -- cgit v1.2.3