From 055ea585c77cd8ae9cd3bc327c1e4404020fdf27 Mon Sep 17 00:00:00 2001 From: David Spickett Date: Wed, 6 May 2020 13:19:52 +0100 Subject: Reland "[CodeGen] Make logic of CCState::resultsCompatible clearer" This relands commit d782d1f898eaafee49548d5332e84c3ae11ebac4. With a typo fixed, which was causing the x86 test failure. --- llvm/lib/CodeGen/CallingConvLower.cpp | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'llvm/lib/CodeGen/CallingConvLower.cpp') diff --git a/llvm/lib/CodeGen/CallingConvLower.cpp b/llvm/lib/CodeGen/CallingConvLower.cpp index 12c4f1b6a219..bc7fa21b8020 100644 --- a/llvm/lib/CodeGen/CallingConvLower.cpp +++ b/llvm/lib/CodeGen/CallingConvLower.cpp @@ -276,18 +276,14 @@ bool CCState::resultsCompatible(CallingConv::ID CalleeCC, for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) { const CCValAssign &Loc1 = RVLocs1[I]; const CCValAssign &Loc2 = RVLocs2[I]; - if (Loc1.getLocInfo() != Loc2.getLocInfo()) - return false; - bool RegLoc1 = Loc1.isRegLoc(); - if (RegLoc1 != Loc2.isRegLoc()) + + if ( // Must both be in registers, or both in memory + Loc1.isRegLoc() != Loc2.isRegLoc() || + // Must fill the same part of their locations + Loc1.getLocInfo() != Loc2.getLocInfo() || + // Memory offset/register number must be the same + Loc1.getExtraInfo() != Loc2.getExtraInfo()) return false; - if (RegLoc1) { - if (Loc1.getLocReg() != Loc2.getLocReg()) - return false; - } else { - if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset()) - return false; - } } return true; } -- cgit v1.2.3