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path: root/llvm/utils/TableGen/CodeGenTarget.cpp
AgeCommit message (Expand)Author
2020-12-30[X86] Add x86_amx type for intel AMX.Luo, Yuanke
2020-12-19[TableGen][ARM][X86] Detect combining IntrReadMem and IntrWriteMem.Craig Topper
2020-12-09[Tablegen] Use llvm::is_contained (NFC)Kazu Hirata
2020-12-06[TableGen] [CodeGenTarget] Cache the target's instruction namespace.Paul C. Anagnostopoulos
2020-11-14[TableGen] Add frontend/backend phase timing capability.Paul C. Anagnostopoulos
2020-10-23[WebAssembly] Implementation of (most) table instructionsPaulo Matos
2020-10-12[IR][FIX] Intrinsics - don't apply default willreturn if IntrNoReturn is spec...sstefan1
2020-10-09[VE] Add new MVT types for NEC SX Aurora VE vectorKazushi (Jam) Marukawa
2020-09-21[PowerPC] Add vector pair load/store instructions and vector pair register classBaptiste Saleil
2020-09-18[TableGen][GlobalISel] Fix handling of zero_regGabriel Hjort Åkerlund
2020-08-27[IR] Add NoUndef attribute to Intrinsics.tdJuneyoung Lee
2020-08-26Reland [IR] Intrinsics default attributes and opt-out flagsstefan1
2020-08-20Revert "[IR] Intrinsics default attributes and opt-out flag"Johannes Doerfert
2020-08-19[IR] Intrinsics default attributes and opt-out flagsstefan1
2020-07-01[MVT] Add new MVT types for RISC-V vector.Hsiangkai Wang
2020-06-30[IR] NoFree IntrinsicProperty.sstefan1
2020-06-25[MVT] Add missing floating point types for 1024/2048-bit vectors.Paul Walker
2020-05-27Enable `align <n>` to be used in the intrinsic definition.Michael Liao
2020-05-27Refactor argument attribute specification in intrinsic definition. NFC.Michael Liao
2020-05-27[CodeGen][BFloat] Add bfloat MVT typeTies Stuij
2020-05-14Add v16f64 value typeStanislav Mekhanoshin
2020-03-19[VP,Integer,#1] Vector-predicated integer intrinsicsSimon Moll
2020-01-28Make llvm::StringRef to std::string conversions explicit.Benjamin Kramer
2020-01-09TableGen/GlobalISel: Fix pattern matching of immarg literalsMatt Arsenault
2020-01-06[NFC] Fix trivial typos in commentsJames Henderson
2019-12-11[TableGen] Remove unused target intrinsic generation logicReid Kleckner
2019-09-19[TableGen] Support encoding per-HwModeJames Molloy
2019-08-30[ValueTypes] Add v16f16 and v32f16 to EVT::getEVTString and Tablegen's getEnu...Craig Topper
2019-08-28Add tie-breaker for register class sorting in getSuperRegForSubRegJessica Paquette
2019-08-27Recommit "[GlobalISel] Import patterns containing INSERT_SUBREG"Jessica Paquette
2019-08-27Revert "[GlobalISel] Import patterns containing INSERT_SUBREG"Jessica Paquette
2019-08-26[GlobalISel] Import patterns containing INSERT_SUBREGJessica Paquette
2019-08-20Teach GlobalISelEmitter to treat used iPTRAny operands as pointer operandsJessica Paquette
2019-08-15MVT: Add v3i16/v3f16 vectorsMatt Arsenault
2019-08-15[llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere
2019-08-14[Intrinsics] Add a 'NoAlias' intrinsic property; annotate llvm.memcpyDavid Bolvansky
2019-07-17[Attributor] Deduce "willreturn" function attributeHideto Ueno
2019-07-15[WebAssembly] Rename except_ref type to exnrefHeejin Ahn
2019-07-07[CodeGen] Add larger vector types for i32 and f32David Majnemer
2019-06-13[IntrinsicEmitter] Extend argument overloading with forward references.Sander de Smalen
2019-03-17[CodeGen] Defined MVTs v3i32, v3f32, v5i32, v5f32Tim Renouf
2019-03-12IR: Add immarg attributeMatt Arsenault
2019-02-12[tablegen] Add locations to many PrintFatalError() callsDaniel Sanders
2019-02-11[tblgen] Add a timer covering the time spent reading the Instruction defsDaniel Sanders
2019-01-23[IR] Match intrinsic parameter by scalar/vectorwidthSimon Pilgrim
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-11-14Mark @llvm.trap coldVedant Kumar
2018-10-25[MCSched] Bind PFM Counters to the CPUs instead of the SchedModel.Clement Courbet
2018-09-27llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song
2018-05-23[GlobalISel][Tablegen] Assign small opcodes to pseudosRoman Tereshin
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